Synthesis method for field programmable gate arrays
Sangiovanni-Vincentelli, A.; El Gamal, A.; Rose, J.
Proceedings of the IEEE
Volume 81, Issue 7, Jul 1993 Page(s):1057 - 1083
Digital Object Identifier   10.1109/5.231344
Summary:Logic synthesis algorithms and methods for field-programmable gate arrays (FPGAs) are reviewed. The three most popular types of FPGA architectures are considered, namely, those using logic blocks based on lookup-tables, multiplexers, and wide AND/OR arrays, respectively. The emphasis is on tools that attempt to minimize the area of the combinational logic part of a design, since little work has been done on optimizing performance or routability, or on synthesis of the sequential part of a design. The different tools surveyed are compared using a suite of benchmark designs

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