Multilevel logic synthesis
Brayton, R.K.; Hachtel, G.D.; Sangiovanni-Vincentelli, A.L.
Proceedings of the IEEE
Volume 78, Issue 2, Feb 1990 Page(s):264 - 300
Digital Object Identifier   10.1109/5.52213
Summary:A survey of logic synthesis techniques for multilevel combinational logic is presented. The goal is to provide more in-depth background and perspective for people interested in pursuing or assessing some of the topics in this emerging field. Introductions, capsule summaries, and, in some cases, detailed analysis of the synthesis methods that have become established as practically significant are provided. Also included are some methods that have theoretical interest and potential for future impact. The discussion covers notation and definitions, representation of the network and nodes, logic decomposition/restructuring, logic optimization/minimization, logic synthesis and testing, and technology mapping

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