Ratio cut partitioning for hierarchical designs
Wei, Y.-C.; Cheng, C.-K.
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Volume 10, Issue 7, Jul 1991 Page(s):911 - 921
Digital Object Identifier   10.1109/43.87601
Summary:Circuit partitioning for hierarchical VLSI design is addressed. A partitioning approach called ratio cut is proposed. It is demonstrated that the ratio cut algorithm can locate the clustering structures in the circuit. Finding the optimal ratio cut is NP-complete. However, in certain cases the ratio cut can be solved by linear programming techniques via the multicommodity flow formulation. Also proposed is a fast heuristic algorithm running in linear time with respect to the number of pins in the circuit. Experiments show good results in all tested cases

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