A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW

In mobile systems, the demand for the energy saving continues to require a low power memory sub-system. During the last decade, the floating-gate flash mem ory has been an indispensable low power memory solution. However, NOR flash memory has begun to show difficulties in scaling due to the device's reliability and yield issues. Over the past few years, phase-change random access memory (PRAM) has emerged as an alternative non-volatile memory (NVM) owing to its promising scalability and low cost process. In this paper, a PRAM, implemented in a 58 nm PRAM process with a low power double-data-rate non volatile memory (LPDDR2-N) interface, is presented.